Abstract
This paper reports synthesis of a built-in self-test logic for the cores integrated into an SoC.
I. INTRODUCTION
In this background, we introduce an efficient scheme to synthesize an n−cell scalable PRPG (in O(n) time) around the nonlinear CA.
II. CELLULAR AUTOMATA
A Cellular Automaton (CA), consisting of a number of cells, evolves in discrete space and time.
If the 3-variable function fi is expressed in the form of a truth table, the decimal equivalent of its output is conventionally denoted as rule Ri [14] of the CA cell.
(page 1, col 2, para 2)
Theorem 1: A reversible CA shows better randomness in
its generated states than that of an irreversible CA
Although a maximal length CA (cycle length 2n−1) is the
right choice for a PRPG [7], the complexity of synthesizing
such a CA is O(n3).
III. DESIGN TARGET
In the current work work, we employ a scalable PRPG
structure developed around the nonlinear CA, involving all the
256 rules (Section II) in 3-neighborhood
IV. CHARACTERIZATION OF CA RULES
A. Local randomness
(page 3)
B. Global randomness
(page 4)
V. SYNTHESIS OF PRPG FOR TEST STRUCTURE
The above discussion points to three rule tables defining
the class of a reversible rule Ri, satisfying C1, C2 & C3, that
dictates the class of (i+1)th cell rule Ri+1.
First and Last rule tables:
Corollary 2: If R =<> is reversible, R1
& Rn must be balanced over their effective 4 RMT s.
There are 4C2 = 6 such R1 (Table III) as well as Rn (Table
IV).
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